FT800.h
FT800.c
잘 돌아 갈래나 모르겠네...
FT800 Programmers Guide의 2.2.5 Initialization Sequence 에는 초기화 시퀀스를 아래와 같이 소개한다.
Initialization Sequence during the boot up:
1. Use MCU SPI clock not more than 11MHz
2. Send Host Command "CLKEXT" to FT800
3. Send Host Command "ACTIVE" to enable clock to FT800
4. Configure video timing registers, except REG_PCLK
5. Write first display list
6. Write REG_DLSWAP, FT800 swaps display list immediately
7. Enable back light control for display
8. Wriet REG_PCLK, video output begins with the first display list
9. Use MCU SPI clock not more than 30MHz
Initialization Sequence from Power Down using PD_N pin:
1. Drive the PD_N pin high
2. Wait for at least 20ms
3. Execute "Initialization Sequence during the Boot Up" from step 1 to 9
Initialization Sequence from Sleep Mode:
1. Send Host command "ACTIVE" to enable clock to FT800
2. Wait for at least 20ms
3. Execute "Initialization Sequence during Boot Up" from steps 5 to 8
Initialization sequence from standby mode:
Execute all the steps mentioned in "Initialization Sequence from Sleep Mode" except waiting for at least 20ms in step 2.
AN240 FT800 From thr Ground Up 문서의 4.2 Configuration 항목도 함 보자.
4.2 Configuration
4.2.1 MCU setup
4.2.1.1 SPI
- <= 10MHz initial SPI clock
-> Use slower clock while on internal oscillator
- Mode zero
-> CPOL = 0 - clock idles at zero
-> CPHA = 0 - data is sampled on rising edge, propagated on falling edge
- Little Endian data byte ordering
4.2.2 Wake Up
After configuring the MCU interface the first step in communicating with the FT800 is to wake it up.
1) Reset the FT800
- Drive PD_N low for 20ms, then back high
- Wait for 20ms after PD_N is high
2) Issue the Wake-up command
- Write 0x00, 0x00, 0x00
3) If using an external crystal or clock source on the FT800, issue the external clock command
- Write 0x44, 0x00, 0x00
4) Set the FT800 internal clock speed to 48MHz
- Wriet 0x62, 0x00, 0x00
5) At this point, the Host MCU SPI Master can change the SPI clock up to 30MHz
6) Read the Device ID register
- Read one byte from location 0x102400
- Check for the value 0x7C
7) Set bit 7 of REG_GPIO to 0 to turn off the LCD_DISP signal
- Write 0x80 to location 0x102490
4.2.3 Configuring the Display Timing
Once the FT800 is awake and the internal clock set and Device ID checked, the next task is to configure the LCD display parameters for the chosen display with the values determined in Section 2.3.3 above.
1) Set REG_PCLK to zero - This disables the pizel clock output while the LCD and other system parameters are configured
2) Set the following registers with values for the chosen display. Typical WQVGA and QVGA values are shown:
3) Enable or disable REG_CSPREAD with a value of 01h or 00h, respectively. Enabling REG_CSPREAD will offset the R, G, and B output bits so all they do not all change at the same time.
4.2.4 Configure the Touch Sensitivity
생략
4.2.5 Configure the audio
생략
4.2.6 Initialize and enable the display
At this point, all the necessary configuration registers are initialized and the system is ready to start displaying video, as well as sensing touch events and playing audio. All of this is done through a Display List.
The Display List
The Display List is formed by writing a series of commands to the RAM_DL memory portion of the FT800 memory map. Graphics elements are handled through commands stored in the list. Register writes for touch and audio elements are handled in line with the Display List.
The FT800 is then instructed to "swap" the Display List that was just created to make it active. While the active list is being shown on the LCD panel, or touch and audio activities processed, a new Display List is formed. Once ready, the lists swap again so the new commands are executed. This process continues for each update shown on the display, new audio sound, etc.
Display list commands are always 32 bits long. The first command on a display list should be to address 0. Subsequent commands should be sent on an increment of 4 bytes to avoid overlap.
Since the system is just starting, there is not active Display List, and the pixel clock is not yet started. The first Display List should start with a blank screen of a chosen color as an initial condition to avoid displaying any artifacts once the pixel clock is started. Here is an example start-up Display List:
wr32(RAM_DL + 0, CLEAR_COLOR_REG(0,0,0));
wr32(RAM_DL + 4, CLEAR(1,1,1));
wr32(RAM_DL + 8, DISPLAY());
wr32(REG_DLSWAP, SWAP_FRAME);
wr32(address, value) indicates the MCU would write the value (CLEAR, POINT_SIZE, etc.) to the address within the display list (RAM_DL + n). This notation is used throughout other FT800 documents.
Up until this point, no output has been generated on the LCD interface. With the configuration and initial display list in place, the LCD DISP signal, backlight and pixel clock can now be turned on:
머 그렇탄다...
초기화 함수 함 만들어봤다
void FT800_Init(void){
uint16_t cmdBufferWr, cmdBufferRd;
HAL_GPIO_WritePin(GPIOC, GPIO_PIN_4, GPIO_PIN_SET);
HAL_Delay(20);
HAL_GPIO_WritePin(GPIOC, GPIO_PIN_4, GPIO_PIN_RESET);
HAL_Delay(20);
HAL_GPIO_WritePin(GPIOC, GPIO_PIN_4, GPIO_PIN_SET);
HAL_Delay(20);
ft800cmdWrite(FT800_CLKEXT);
HAL_Delay(5);
ft800cmdWrite(FT800_ACTIVE);
HAL_Delay(5);
ft800memWrite16(REG_HCYCLE, 548);
ft800memWrite16(REG_HOFFSET, 43);
ft800memWrite16(REG_HSYNC0, 0);
ft800memWrite16(REG_HSYNC1, 41);
ft800memWrite16(REG_VCYCLE, 292);
ft800memWrite16(REG_VOFFSET, 12);
ft800memWrite16(REG_VSYNC0, 0);
ft800memWrite16(REG_VSYNC1, 10);
ft800memWrite8(REG_SWIZZLE, 0);
ft800memWrite8(REG_PCLK_POL, 1);
ft800memWrite8(REG_CSPREAD, 1);
ft800memWrite16(REG_HSIZE, 480);
ft800memWrite16(REG_VSIZE, 272);
ft800memWrite32(RAM_DL, CLEAR_COLOR_RGB(0,0,0));
ft800memWrite32(RAM_DL+4, CLEAR(1,1,1));
ft800memWrite32(RAM_DL+8, DISPLAY());
ft800memWrite32(REG_DLSWAP, DLSWAP_FRAME);
ft800memWrite8(REG_PCLK, 5);
HAL_Delay(50);
ft800memWrite32(RAM_DL, CLEAR(1,1,1));
ft800memWrite32(RAM_DL+4, BEGIN(1));
ft800memWrite32(RAM_DL+8, VERTEX2II(220,110,31,'F'));
ft800memWrite32(RAM_DL+12, VERTEX2II(244,110,31,'T'));
ft800memWrite32(RAM_DL+16, VERTEX2II(270,110,31,'D'));
ft800memWrite32(RAM_DL+20, VERTEX2II(299,110,31,'I'));
ft800memWrite32(RAM_DL+24, END());
ft800memWrite32(RAM_DL+28, COLOR_RGB(160,22,22));
ft800memWrite32(RAM_DL+32, POINT_SIZE(320));
ft800memWrite32(RAM_DL+36, BEGIN(2));
ft800memWrite32(RAM_DL+40, VERTEX2II(192,133,0,0));
ft800memWrite32(RAM_DL+44, END());
ft800memWrite32(RAM_DL+48, DISPLAY());
ft800memWrite32(REG_DLSWAP, DLSWAP_FRAME);
MX_SPI1_Init_HIGH();
}
와 나온다
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